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SN11113 spec
SN11113 USB AUDIO CONTROLLER
Data Sheet
2003 March 5th, Version 1.01
1
SN11113 spec I. Description
SONiX SN11113 is an USB audio controller. It supports 32KHz, 44.1KHz and 48KHz sampling rate in digital playback and recording; 44.1KHz and 48 KHz sampling rate in analog audio playback and recording. In digital playback mode, it receives audio stream from PC via USB interface and transmits audio data according to the AES/EBU, IEC60958, S/PDIF consumer interface standards. In analog playback mode, it supports AC 97 Codec for analog playback. In digital recording mode, it receives S/PDIF digital audio input and sends back to PC through USB. Three sampling rates; includes 32 KHz, 44.1 KHz, and 48 KHz; are automatically locked internally. In analog recording mode, 44.1KHz and 48 KHz sampling rate are supported by analog audio recording. Totally one control pipe, two isochronous pipes, and one interrupt pipe are supported by SN11113.
II. Features
Supports AES/EBU, IEC60958, S/PDIF consumer formats for stereo PCM data 32K, 44.1K and 48KHz sampling rate for 2 channel playback in digital mode Conveys AC-3 data stream by S/PDIF output 44.1K and 48KHz sampling rate for 2 channel playback in analog mode Supports digital recording function with 32KHz, 44.1KHz and 48KHz sampling rate Supports analog recording function with 44.1KHz and 48KHz sampling rate Supports SCMS (Serial Copy Management System) copy protection Full-duplex playback/ recording audio stream without sound card in PC Compatible with Win98 SE/ WinME/ Win2000/ WinXP and MacOS 9.2.1 / MacOS10.1 without additional driver Plug-and-Play operation with Microsoft OS or MacOS default drivers Compliant with USB specification v1.1 Compliant with USB audio device class specification v1.0 Supports USB full speed 12Mbits/s serial data transmission USB bus powered operation Supports suspend/resume and remote wake-up 6MHz crystal input with on-chip PLL and embedded transceiver for USB
2
SN11113 spec
USB audio function topology has four input terminals, three output terminals, one selector unit, one mixer unit, and six feature units Alternate setting0 is a zero-bandwidth setting; used to release the claimed bandwidth on the bus when this device is inactive Isochronous transfer uses adaptive, synchronous and asynchronous synchronization Supports AC'97 component specification v2.1 and v2.2; AC link interface for external AC97 audio Codec Compliant with USB HID class specification v1.1; pin control for volume up / down, play mute, and record mute Supports two wire series bus interface; slave only interface with transfer speed up to 400Kbps(Fast-mode) EEPROM interface for customized USB IDs and Codec programming 3.3 V core operation and 5 V tolerant I/O Available in 64-pin LQFP(10x10 mm) System on chip solution: low cost and easy implementation without external memory LED indicator pins for playback and recording mute Features programmable by jumper pins
III. Ordering information
SN11113F : 64-pin LQFP (10x10x1.4 mm)
IV.
Block diagram
PDSW (TYPE0, TYPE1, TYPE2, TYPE3, PLLEN, RECO RD) LEDN HIDMUTER SO F CMPCLK XIAUD XO AUD
RS TN
Preamble Validity
VO LUP VO LDN MUTEP MUTER SCL SDA CS SK DW DR
CLK generator
User data bits Channel status bits Parity
M U X S/PDIF O UT
Processor
MCU interface
Aux data parallel / serial Audio data
EEPROM interface
-
Transceiver
ACDIN
D+ D-
serial / parallel
USB
Memory FIFO
AC'97 Controller
BITCLK ACRS TN ACSYNC ACDO UT
DPLL
XIUSB
PLL
XO USB
S/PDIF decoder
Digital receiver
S/PDIF IN
3
SN11113 spec V.
5.1
Pin description
SN11113 pin chart (64-pin LQFP)
ACSYNC
45
40
35
45 TYPE3 CMPCLK VOLDN ACDOUT MUTEP PLLEN VSS VDD TAVSS USBDM USBDP TAVDD AVSS AVDD HIDMUTER TYPE0 1 TYPE1 TYPE2 5 PDSW 60 55 50
40
35 ACRSTN NC 30 NC CS RVDD SK SPDIFO
USB audio controller SN11113
RECORD
XOAUD
BITCLK
VOLUP
XVDD2
XVSS2
ACDIN
XIAUD
RVDD
RVSS
RVSS
VDD
VSS
NC
NC
25
DW DR VSS VDD XVSS1
20
XOUSB XIUSB XVDD1 MUTER
10 RVDD RVSS
15
5.2
pin assignment and description (64-pin LQFP) Pin Type
I, ST
Pin No. Pin Name
1 2 3 TYPE1 NC NC
Description
Product type setting pin1
4
SPDIFI
RSTN
LEDN
VDD
SDA
VSS
SCL
SOF
NC
NC
NC
SN11113 spec
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 TYPE2 RSTN PDSW SOF VDD VSS NC RVDD SDA SCL RVSS LEDN SPDIFI MUTER XVDD1 XIUSB XOUSB XVSS1 VDD VSS DR I, ST I, ST, PU O, 4mA, SR O, 4mA, SR P P P I/O, 4mA, SR I, ST P O, 8mA, SR I, ST I, ST P I O P P P I, ST
Product type setting pin2 System reset pin, pull low to reset Power down switch control -- 0: normal mode, 1: power down mode USB SOF (Start of Frame) pin provides 1KHz signal Power pin Power pin
Power pin for pad IIC data pin for external MCU control IIC clock pin for external MCU control Power pin for pad LED indicator pin, output low after power on reset, toggle during operation Input pin for SPDIF signal Recording mute, edge trigger with 64ms de-bouncing circuit Power pin for USB external crystal 6 MHz clock osc pin for USB PLL 6 MHz clock osc pin for USB PLL Power pin for USB external crystal Power pin Power pin EEPROM data input Fixing this pin to H or L sets USB vendor ID to SONiX USB vendor ID (hex
0C45); PU or PD is used for different product ID 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 DW SPDIFO SK RVDD CS NC NC ACRSTN RECORD NC RVSS BITCLK VOLUP ACSYNC NC ACDIN VSS VDD XVSS2 XOAUD XIAUD XVDD2 RVSS RVDD TYPE3 O, 4mA, SR O, 8mA, SR O, 4mA, SR P O, 4mA, SR
EEPROM data output SPDIF data output EEPROM clock pin Power pin for pad EEPROM chip select
O, 4mA, SR I, ST P O, 8mA, SR I, ST O, 4mA, SR I, ST P P P O I, ST P P P I, ST
AC'97 Codec reset Recording function enable (=1)
Power pin for pad AC'97 serial data clock Volume up control, edge trigger with 64ms de-bouncing circuit AC'97 Codec sync (48 kHz) signal
AC'97 Codec serial data input Power pin Power pin Power pin for external crystal 12.288 MHz Crystal output 12.288 MHz Crystal input / connected to PLL VCO output Power pin for external crystal Power pin for pad Power pin for pad Product type setting pin3
5
SN11113 spec
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 CMPCLK VOLDN ACDOUT MUTEP PLLEN VSS VDD TAVSS USBDM USBDP TAVDD AVSS AVDD HIDMUTER TYPE0 O, 4mA, SR I, ST O, 4mA, SR I, ST I, ST P P P I/O I/O P P P O, 8mA, SR I, ST
PLL comparator input Volume down control, edge trigger with 64ms de-bouncing circuit AC'97 Codec serial data Playback mute control pin, edge trigger with 64ms de-bouncing circuit Use PLL (=1) Power pin Power pin Power pin for USB transceiver USB data minus USB data plus Power pin for USB transceiver Power pin for PLL Power pin for PLL Playback mute led indicator Product type setting pin0 or Crystal at XIAUD pin
** All input pin are 5 volt tolerance, TTL level and Schmitt trigger All output pins are slew rate control I - input pin , O - output pin, P - power pin, ST - Schmitt trigger, SR - slew rate control, PU/PD - pull up or pull down
6
SN11113 spec VI.
6.1
symbol Dvmin Dvmax Avmin Avmax Dvinout Avinout Tstg ESD (HBM) ESD (MM) Ioff Ilatch
Operating rating and electrical characteristics
Absolute maximum rating
Parameter min digital supply voltage max digital supply voltage min analog supply voltage max analog supply voltage voltage on any digital input or output pin voltage on any analog input or output pin storage temperature range ESD human body mode C=100pF, R=1.5K ESD machine mode Leakage current minimum latch up current value DGND - 0.3 DGND + 4.6 AGND - 0.3 AGND + 4.6 DGND -0.3 to 5.5 AGND -0.3 to Avdd + 0.3 -40 to +125 5000 200 10 100 unit V V V V V V
0
C
V V uA mA
6.2
symbol DVdd Avdd TA TJ
Operation conditions
Parameter digital supply voltage analog supply voltage operating ambient temperature range operating junction temperature range value +3 to +3.6 +3 to +3.6 0 to 70 0 to 115 unit V V
0 0
C C
6.3 DC electrical characteristics
symbol VDI VCM VSE VIH VIL VOH VOL IIL parameter differential input sensitivity differential common mode range single ended receiver threshold high level input voltage low level input voltage high level output voltage low level output voltage low level input current IOH = -4 mA IOL= 4 mA VI = 0 V test condition | (D+) - (D-) | Included VDI range Value 0.2 (min) 0.8 (min) 2.5 (max) 0.8 (min) 2.0 (max) 2.0 (min) 0.8 (max) 2.3 (min) 0.5 (max) RSTN pin : the other pins : - 50.0 (max) - 3.0 (max) unit V V V V V V V A
7
SN11113 spec
IIH high level input current VI = 3.6 V SPDIFI, XSDIN pins : the other pins : 20 (max) 20 (max) 3.0 (max) A 3.0 (max) mA A
IDD Isuspend
input supply current supply current in suspend
6.4 AC electrical characteristics 6.4.1
symbol Tr Tf Trfm Vo(crs)
USB transceiver signal (full speed mode)
parameter transition rise time for DP or DM transition fall time for DP or DM rise / fall time matching signal crossover voltage (Tr / Tf ) * 100 test condition min 4 4 90 1.3 max 20 20 110 2.0 unit ns ns % V
6.4.2
symbol CLKin
Operation clocks
parameter XIAUD/XOAUD crystal value BITCLK serial data clock CLKin duty cycle XIUSB/XOUSB crystal value USBCLKin duty cycle Value 12.288 (typ) 50 2 6 (typ) 50 2 unit MHz % MHz %
USBCLKin
6.4.3 External EEPROM interface
symbol Fsk parameter SK pin clock frequency Value 200 unit kHz
6.4.4 AC'97 Audio Codec interface timing Please refer to AC'97 component specification ver2.1, ver2.2 6.5
symbol Isys_op Isys_suspend
System level power consumption reference values
parameter USB device operation power consumption USB device suspend power consumption Value 100 (max) 304 (max) unit mA A
8
SN11113 spec VII. Function and control register description
7.1 Controller topology AC-97 analog / digital playback and recording
IT 1 USB OUT FU D MU F FU 9
OT 5 SPDIF OUT OT 6 SPK OUT FU E
IT 2 MIC IN IT 3 LINE IN IT 4 SPDIF IN
FU A
FU B
SU 8
OT 7 USB IN
FU C
7.2 7.2.1
Topology setting and button function Topology setting
(a) Digital function only or analog function only
1. AC'97 D : only S/PDIF in/out
2. iMAC(44.1K) : only AC'97 analog out, 44.1KHz playback and recording without mixer 3. headset(44.1K & mixer) : only AC'97 analog out, 44.1KHz playback and recording with mixer 4. headset(44.1/48K & mixer) : only AC'97 analog out, 44.1KHz/48KHz playback and recording with mixer 9
SN11113 spec
pin TYPE0 TYPE1 TYPE2 TYPE3 PD
AC'97 D iMAC(44.1K) Headset(44.1K & mixer) headset(44.1/48K & mixer)
0 0 0
1: bused power (500mA) 0: bused power (100mA)
0 0 1
0 1 0
0 1 1
1: bused power (500mA) 0: bused power (100mA)
1: bused power (500mA) 1: bused power (500mA) 0: bused power (100mA) 0: bused power (100mA)
1: use PLL
1: use PLL 0: use Crystal
1: use PLL 0: use Crystal
PLLEN
always use PLL 1: D recording source, SPDIF(def =SPDIF) only
0: use Crystal
1: A recording source, only 1: A recording source, 1: A recording source, MIC (def = MIC) MIC & LINE(def = MIC) MIC & LINE(def = MIC) 0: none 0: none 1: fit PC monitor & record Gain ctrl MUTER button will mute monitor CH 0: none 0: MUTER button doesn't mute monitor CH
RECORD
0: none
(romopt, pllen) = 1: fit PC monitor & record (1,0) : 44.1K play/record rate & Gain ctrl no HID, (1,1) : 44.1K play/record rate & HID (romopt, pllen) = 0: fit iMAC monitor & (0,0) : 48K play rate, record Gain ctrl 32K/44.1K/48KHz record rate & HID (0,1) : 32K/44.1K/48KHz play rate, 32K/44.1K/48KHz record rate & HID
0: fit iMAC monitor & record 1: MUTER button will mute Gain ctrl monitor CH MUTER button will mute monitor CH
ROMOPT
`ROMOPT' value is set by `DR' pin when no EEPROM is mounted on the board. Pulling high or pulling low at DR pin can set `ROMOPT' value to be 1 or 0. When EEPROM is used on the board, `ROMOPT' is defined by USB product ID bit1. (b) Digital + analog function
1. AC'97 A+D+REC(A) : Digital and Analog playback, Analog recording only
2. AC'97 A+D+REC(A+D) : Digital and Analog playback, Digital and Analog recording 3. AC'97 A+D+H+REC(A) : Digital and Analog playback, Analog recording only, USB HID function enable
4. AC'97 A+D+H+REC(A+D) : Digital and Analog playback, Digital and Analog recording, USB HID function enable
PD pin
AC'97 A+D+REC(A)
AC'97 A+D+REC(A+D)
AC'97 A+D+H+REC(A)
AC'97 A+D+H+REC(A+D)
TYPE0 TYPE1 TYPE2
1 0 0
1 0 1 10
1 1 0
1 1 1
SN11113 spec
1: bused power (500mA) 1: bused power (500mA) 0: bused power (100mA) 1: bused power (500mA) 0: bused power (100mA) 1: bused power (500mA) 0: bused power (100mA)
TYPE3
0: bused power (100mA)
1: use PLL
1: use PLL 0: use Crystal
1: use PLL 0: use Crystal
1: use PLL 0: use Crystal
PLLEN
0: use Crystal
1: A recording source, MIC & LINE (def = MIC)
1: A+D recording sources, MIC & LINE & SPDIF (def = MIC)
1: A recording source, MIC & LINE (def = MIC)
1: A+D recording sources, MIC & LINE & SPDIF (def = MIC)
RECORD
0: none
0: none
0: none
0: none
0: MUTER button doesn't mute 0: MUTER button doesn't mute 0: MUTER button doesn't mute 0: MUTER button doesn't mute monitor CH monitor CH monitor CH monitor CH 1: MUTER button will mute monitor CH 1: MUTER button will mute monitor CH 1: MUTER button will mute monitor CH 1: MUTER button will mute monitor CH
ROMOPT
`ROMOPT' value is set by `DR' pin when no EEPROM is mounted on the board. Pulling high or pulling low at DR pin can set `ROMOPT' value to be 1 or 0. When EEPROM is used on the board, `ROMOPT' is defined by USB product ID bit1. SN11113 can adopt two type clock sources for internal logic. One is using external PLL and the other is using external crystal. `PLLEN' pin is used to define clock source. When using external PLL, it can synchronize to the USB frame rate. If the USB audio device uses PLL as clock source and enables USB HID function, it can convey AC-3 data stream by vendor specific software when playing DVD on PC. `RECORD' pin is used to enable recording function. When the USB audio device having recording function is plugged into PC, there is a default recording source defined above table. If `RECORD' pin is pulled down, then the USB audio device has no recording function.
7.2.2
button function
The SN11113 has four buttons to control playback and recording volume. It supports volume up, volume down, play mute, and recording mute. Button function is only effective in analog terminal. 1M pull-up resistors connected to 3.3V are recommended for these pins. It supports remote wakeup from device. A device in the resume state may respond to pressing button event by signaling a wakeup to PC via the USB.
11
SN11113 spec
7.2.3 LED indicator
There are two LED pins used to indicate the operation condition. `LEDN' is flashing in a 256ms period during playback and recording. `HIDMUTER' lights up when pressing `MUTER' button to enable recording mute function.
7.3
Playback / recording sample rate under different product configuration Playback Recording
D : 48KHz/ 44.1KHz , A : 48KHz/ 44.1KHz
Product
notes
when playing AC3 data stream to Digital output, mute Analog output
AC'97 A+D+REC(A), D : 48KHz , AC'97 A+D+REC(A+D), A : 48KHz AC'97 A+D+H+REC(A), AC'97 A+D+H+REC(A+D)
headset(44.1/48K & mixer) 44.1KHz/ 48KHz iMAC(44.1K), headset(44.1K & mixer) 44.1KHz 44.1KHz (ROMOPT=1'b1, PLLEN=1'b1 / 1'b0)
44.1KHz/ 48KHz 44.1KHz 44.1KHz
when playing 44.1KHz , mute Digital output when playing 44.1KHz , mute Digital output
AC'97 D
48KHz (ROMOPT=1'b0 & PLLEN=1'b0) 32K/44.1K/48KHz (ROMOPT=1'b0 & PLLEN=1'b1)
32K/ 44.1K/ 48KHz
32K/ 44.1K/ 48KHz
7.4
Audio output
SN11113 supports 16-bit stereo PCM audio data output at 32K, 44.1K and 48KHz sample rate. The audio data sent from USB is sent to both SPDIF out terminal (digital out) and Speaker out terminal (analog out). AC'97 Codec can be used at the Speaker out terminal to get analog audio sound. If the device uses external PLL and enable USB HID function, it can convey AC-3 data stream to S/PDIF out terminal (digital out). 7.5 Audio input
SN11113 can record 16~24 bits stereo PCM audio data at 32, 44.1 and 48KHz sample rate via S/PDIF input. It converts incoming audio data format to 16 bits PCM data. In digital recording,
12
SN11113 spec
SN11113 supports SCMS (serial copy management system); if incoming digital audio data has copyright protection enabled, it will not record this audio data and send silent audio data to PC. Because the digital audio data has its original data format (16~24bits) and sample rate, sample rate in recording software on PC should be set as the same rate when user wants to record this digital audio data. For analog audio data recording, it supports two sampling rate : 44.1KHz and 48KHz.
7.6 EEPROM data storage pattern
EEPROM address 0 1 2 3 4 5 6 . . High byte (MSB to LSB) Low byte (MSB to LSB) Notes idVendor high byte idProduct high byte Control word high byte Reg address Reg dataH Reg address Reg dataH Reg address Reg dataH idVendor low byte idProduct low byte Control word low byte X Reg dataL X Reg dataL X Reg dataL
Refer to the next table Programming AC'97 reg address Programming reg data Programming AC'97 reg address Programming reg data Programming AC'97 reg address Programming reg data
* 16 bit per word at each address
control word (address 02)
15 R 14 R 13 12 11 10 9 8 7 6 5 4 3 2 1 0 cdcreg outsw regcnt3 regcnt2 Regcnt1 regcnt0 Chk7 Chk6 Chk5 Chk4 Chk3 Chk2 Chk1 Chk0 R - reserved cdcreg - 0 : programming with EEPROM values 1: programming with SN11113 built-in values bit 12 bit11 - bit 8 bit 7 - bit 0 outsw - 0 : volume control Aux. Line Out (ox04) 1 : Volume control Stereo Line Out (0x02)
bit 15 - bit 14 bit 13
regcnt [3:0] - toatl number of programming AC'97 Codec registers Chk [7:0] - EEPROM magic code (Hex AB), used to check EEPROM existence
programming example:
bit 13 = 1, bit 13 = 0, bit 13 = 0, ignore setting in bit 11 to bit8 , using SN11113 built-in programming values regcnt [3:0] regcnt [3:0] 0 =0 - using programming values stored in EEPROM - inhibition
13
SN11113 spec
AC'97 Codec registers default values
(1) iMAC mode Address (HEX) 04 2A 2C 1A 1C 18 32 10 0E Name Alt. line output vol. Ext. audio stat/control PCM front DAC rate Record select Record gain PCM out volume PCM LR ADC rate Line in volume Mic in volume Setting value 0000 0001 AC44 0000 0000 0808 AC44 8808 8008
(2) Headset (44.1K & Mixer) mode Address (HEX) 04 2A 2C 1A 1C 18 32 10 0E (3) The other modes Address (HEX) 04 2A 10 1A 1C 18 0E Name Alt. line output vol. Ext. audio stat/control Line in volume Record select Record gain PCM out volume Mic in volume Setting value 0000 0001 8808 0000 0000 0808 0008 Name Alt. line output vol. Ext. audio stat/control PCM front DAC rate Record select Record gain PCM out volume PCM LR ADC rate Line in volume Mic in volume Setting value 0000 0001 AC44 0000 0000 0808 AC44 8808 0008
EEPROM read sequence:
idVendor (MSB to LSB) Programming reg data ... idProduct (MSB to LSB) Control word Programming reg address
14
SN11113 spec
7.7 SPDIF
SPDIF Channel Status Block Structure -consumer format bit0 byte0 consumer default 0 byte1 default byte2 default byte3
32KHz 44.1KHz
bit1
bit2
bit3
bit4 emphasis 0
bit5
bit6 mode
bit7
audio/data copyright 0(W) 1(W)
0
0
0
0 L 0(W)
0(W)
0(W)
category code 0(W) 0(W)
0(W)
0(W)
0(W)
source number 1 0 0 0 1 0
channel number 0 0 1 0 reserved 0
0 0
default
48KHz
sampling frequency 1 1 0 0 0 0 0 1 0
clock accuracy 0 0 0 0 0
0
W : These bits can be programmed by vendor specific driver via USB.
15
SN11113 spec VIII. Application
8.1 Application example
PC or NoteBook
Audio CD Audio data stream
USB cable
MD , DAT Multimedia amplifier AC-3 Decoder
S/PDIF out
VCD, DVD
... etc.
Line-out
USB wav, mp3, or other audio AP
SONiX SN11113
AC'97 Codec AC link
Line-in / Microphone in
S/PDIF in
DAT, MD, CD player with S/PDIF out
8.2
Brief application circuit chart
programmable Jumper pins LED N, HIDMUTER MCU interface 12.288MHz TYPE0, TYPE1, TYPE2, TYPE3, PLLEN, RECORD
PC
USB
SN11113
AC link
AC97 CODEC
Line out Line in MIC in
push buttons 6 MHz ( VOLUP, VOLDN, MUTEP, MUTER ) SOF, CMPCLK, PDSW
93C46
S/PDIF OUT
S/PDIF IN
EEPROM
* detail application circuit is available by customer request
16
SN11113 spec IX. Package Specification
D1 A1 D A2
48
33
49
32
E
E1
64
17
L1
1 e b
16
L (0.6)
c
(0 ~ 7 )
0
0
64-pin LQFP package
Lead Count 64 Body Size D 10.00
E 10.00
D1 12.00 Lead Width b 0.24
E1 12.00 Lead Thk Lead Pitch c e 0.125 0.50
Stand-off Body Thk A1 A2 0.10 1.40
Lead Length L1 1.00
Unit : mm
17
SN11113 spec Appendix A Two wire series bus in SN11113
To provide extension capability, SN11113 contains a two wire series bus circuitry as an interface to MCU. The two wire series bus serves as a slave device with bit rate up to 400Kbps (fast mode). MCU can write two bytes to SN11113 with 8-bit register address 8'bxxxxxxx0 and 8'bxxxxxxx1; where `x' means either `0' or `1'. MCU can also read one byte from SN11113 by any register address. The 7-bit slave address of SN11113 is assigned as 7'b0111000. With `HIDEN' activated, SN11113 will transfer the two bytes to the USB host via an additional interrupt pipe when any byte is written to it by MCU. Accompany with the two bytes two wire series bus data, SN11113 will also send one byte of button status. The sequence of the upward HID report is the button status first (LSB), then register with address 8'bxxxxxx0, then register with address 8'bxxxxxx1 (MSB). The USB host will keep polling the upward HID report every 32mS. When there is any button pressed or released, or two wire series bus data coming, SN11113 will transfer the three bytes of HID report to the USB host. SN11113 can also transfer one byte data from the USB host to its register when `HIDEN' is active. This is accomplished by a `Set Output Report' HID class request via default control pipe. MCU can get this downward byte by polling. That is, MCU should read the byte at its favorite rate. This document just provides simple description of the two wire series bus. User can get more detailed explanation from the specification. SN11113 has one input pin `SCL' where it gets two wire series bus clock from MCU, and one open-drain output pin `SDA' where it sends or receives serial signal to/from MCU. As shown below, `SDA' should be stable when `SCL' is high, and can have transition only when `SCL' is low.
18
SN11113 spec
START and STOP conditions shown below are the exception. Every two wire series bus transaction begins from a START, and ends with a STOP, or another START (repeated START).
The figure below demonstrates a typical two wire series bus transaction. After every 8 bits sent by the transmitter, the receiver should send one bit low for positive acknowledgement or one bit high for negative acknowledgement. After the negative acknowledgement, a STOP or repeated START should follow. The next figure shows more detailed about acknowledgement bit. Note that `SCL' is always driven by the master.
19
SN11113 spec
The figure below shows a complete data transfer. After a START, MCU should send 7-bit slave address (7'b0111000) first, and then the 8th bit denotes a read transfer when it's high; or a write transfer when it's low. The first acknowledgement is always a duty of SN11113.
In the write transfer, MCU keep acting as the master and the transfer direction is not changed. The following figure gives an example of one byte write transfer.
SN11113 regards the first DATA byte as the register address. The second DATA byte is the content that MCU would like to write at the register address. If there is the third DATA byte, SN11113 will record this byte to the other register address. Note that the register address is auto-increment. The figure below shows an example of two bytes read transfer. Because SN11113 has only one byte register to be read, the second DATA byte will be the same as the first one.
20
SN11113 spec
Please note that the USB host try to get new HID data every 32mS. It's quite slow. If the continuous two wire series bus write transfers are too close in time, the former transfer may have no effect.
21
SN11113 spec SONiX Technology Co., Ltd
Headquarters: 9F, No. 8 Lane 32, Hsien Chen 5th St. Chupei City, Hsinchu, Taiwan R.O.C.
TEL:886-3-5510520 FAX:886-3-5510523 http://www.sonix.com.tw
Taipei Office: 15F-3, No. 171, Song Ted Road, Taipei, Taiwan R.O.C.
TEL:886-2-27591980 FAX:886-2-27598180
HongKong Office: Flat 3 9F Energy Plaza 92 Granville Road, Tsimshatsui East Kowloon
TEL:002-852-27238086 FAX:002-852-27239179 E-mail:sonix@ismart.net
22

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